stm32n6: Add DSB after EXTI pending clear; default to task accounting

The EXTI pending-register clear can lag behind the ISR return, causing
the NVIC to re-enter the handler spuriously. Add a DSB to ensure the
store has propagated before the callback runs.

Also drop the ENABLE_TASK_ACCOUNTING?=no override so the platform
picks up the common default (on).

Author: andoma

src/platform/stm32n6/stm32n6.mk

@@ -2,8 +2,6 @@ P := ${SRC}/platform/stm32n6
 
 GLOBALDEPS += ${P}/stm32n6.mk
 
-ENABLE_TASK_ACCOUNTING ?= no
-
 CPPFLAGS += -iquote${P} -include ${P}/stm32n6.h
 
 LDSCRIPT ?= ${P}/stm32n6.ld

src/platform/stm32n6/stm32n6_gpio.c

@@ -186,6 +186,7 @@ gpio_irq(int line)
   uint32_t mask = 1 << line;
   reg_wr(EXTI_RPR1, mask);
   reg_wr(EXTI_FPR1, mask);
+  asm volatile("dsb");
   gpio_irqs[line].cb(gpio_irqs[line].arg);
 }